1. Field of the Invention
The present invention relates to an active matrix substrate and a liquid crystal display device with the same.
2. Description of the Related Art
Recently, active matrix liquid crystal display devices, which employ thin film transistors (hereinafter referred to as TFTs) as pixel switching elements, have been widely employed as high-resolution display devices. Classifications for these liquid crystal display devices include the Twisted Nematic (TN) mode type where a director for aligned molecules of liquid crystal is rotated to a direction perpendicularly to a TFT substrate, and the In Plane Switching (IPS) mode type where the director is rotated to a direction parallel to a TFT substrate.
In the IPS-mode liquid crystal display device, pixel electrodes and common electrodes are alternately arranged, parallel to each other, on a TFT substrate whereon TFTs are formed. Then, an electric field parallel to the substrate surface is formed by applying a voltage between the pixel electrodes and the common electrodes, and the direction of the director of liquid crystals is thus changed. A quantity of light to be transmitted through the IPS-mode liquid crystal device is controlled depending on the direction of the director of liquid crystals. According to this display method, since the director is rotated within the substrate surface unlike in the case of the TN-mode type, it is possible to evade a problem that relations between the quantity of transmitted light and the applied voltage differ greatly when viewed from the director and when viewed in the normal direction of the substrate. The IPS-mode liquid crystal display device can thus provide a preferable image even when the visual angle is very large.
A plurality of gate lines (equivalent to scan lines) and a plurality of drain lines (equivalent to signal lines) are provided substantially orthogonally on the TFT substrate, in order to drive the TFTs arranged to form a matrix. Further, gate terminals to be connected to the gate lines, or drain terminals to be connected to the drain lines, are arranged in the terminal area, at the outer edge of the TFT substrate. For the IPS-mode liquid crystal display device, common lines for connecting common electrodes, which are provided for respective pixels, are also formed on the same layer as the gate lines. Accordingly, common line terminals, to which the common lines are to be connected, must be formed in the terminal area.
Here, on account of the size reduction of the TFT substrate for downsizing and higher integration of a liquid crystal display, the respective common lines can not separately be connected to the terminals. Therefore, for a conventional IPS-mode liquid crystal display device, generally, a line (hereinafter referred to as a bus line) extending substantially parallel to the drain lines is formed between the display area and the terminal area. That is, a structure is employed wherein the respective common lines are joined at a bus line, and the joined common lines are branched to the common line terminals located at predetermined intervals.
This structure will be explained while referring to FIGS. 1A and 1B. FIG. 1A is a plan view of the structure in the vicinity of the gate terminals for the TFT substrate of a conventional IPS-mode liquid display device. FIG. 1B is a cross-sectional view taken along the line IV-IV in FIG. 1A. With reference to FIGS. 1A and 1B, for the conventional IPS-mode liquid crystal display device, the ends of the common lines 6 extending from a display area are connected and joined to a bus line 9a by contacts 11b. Further, via the bus line 9a and a contact 11c, the ends of the common lines 6 extending from the display area are connected to a lead line 13 for common line terminals 12b which are formed on the same layer as are gate lines 5.
By employing this structure, the required number of common line terminals 12b can be reduced. However, in the display area, the common lines 6 are formed on the same layer as the gate lines 5 and are connected by the contacts 11b to the bus line 9a formed on the same layer as the drain lines. Further, the common lines 6 are also connected by the contact 11c to the lead lines 13 formed on the same layer as the gate lines 5. Therefore, the common lines 6 must pass through at least two contacts en routes to the common line terminals 12b. As a result, resistance along the routes taken by the common line (common line routes, hereafter) is increased, signals transmitted along the common lines are delayed and display failures such as traverse cross talk and flickers occur.
In order to suppress display failures such as traverse cross talk and flickers due to resistance along the common line routes, various methods have been proposed. For example, a liquid crystal display device which includes lead lines, of which portions facing a display area are connected to common lines, is disclosed in Japanese Patent Laid-Open Publication No. 2002-55352 (pp. 7-12, FIG. 2).
By referring again to the conventional liquid crystal display device in FIG. 1A, the lead lines 13, of which portions facing the display area are connected to the common lines 6, are provided at the end of a glass substrate at predetermined pitches. The lead lines 13, composed of metal films of which the transmittance of light emitted by a backlight is extremely low, are positioned between terminals which are divided into and joined as a plurality of blocks. The lead lines 13 are so provided that they substantially fill the intervals between the blocks.
The conventional liquid crystal display device disclosed in the above publication has a constitution where the lead lines 13 are provided and are connected to the common line terminals 12b which are located at either end of the adjacent groups (blocks) of the gate terminals 5a. For the conventional liquid crystal display device, a metal film having the shape of a substantially isosceles triangle is deposited in an area which is sandwiched between lead lines 13, so as to reduce, to a degree, resistance along the common line routes.
However, in order to connect the common lines 6 in the display area and the common line 12b as described above, the common lines 6 on the same layer as the gate lines 5 in the display area must be connected, via the bus line 9a formed on the same layer as the drain lines 9, to the common line terminals 12b on the same layer as the gate lines 5. That is, the two contacts 11b and 11c must be passed through. These contacts are generally formed of Indium Tin Oxide (hereinafter referred to as ITO) which is employed for a common electrode. However, since the contact areas are small and hence resistance of ITO is higher than resistance of metal lines, the reduction in resistance along the common line routes is limited when the structure of the conventional liquid crystal display device disclosed in the above publication is used. As a result, it is not possible to satisfactorily prevent display failures such as traverse cross talk and flickers from occurring when signals transmitted along the common line routes are delayed.
The present invention is offered to resolve the above-described problems, and the main objective of the invention is the provision of an active matrix substrate by which display failures such as traverse cross talk and flickers can be prevented from occurring when signals along the common line routes are delayed, and a liquid crystal display device which employs the substrate.